Journal Article
- Danfeng Zhang, Andrew C. Myers, Dimitrios Vytiniotis and Simon Peyton-Jones, 2017, "SHErrLoc: a static holistic error locator", ACM Transactions on Programming Languages and Systems (TOPLAS), 39, (4)
Conference Proceeding
- Robert Brotzman-Smith, Shen Liu, Danfeng Zhang, Gang Tan and Mahmut T Kandemir, 2019, "CaSym: Cache Aware Symbolic Execution for Side Channel Detection and Mitigation"
- Gurunath Kadam, Danfeng Zhang and Adwait Jog, 2018, "RCoal: Mitigating GPU Timing Attack via Subwarp-based Randomized Coalescing Technique"
- Zeyu Ding, Wang Yuxin, Guanhong Wang, Danfeng Zhang and Daniel Kifer, 2018, "Detecting Violations of Differential Privacy."
- Peixuan Li and Danfeng Zhang, 2018, "A Derivation Framework for Dependent Security Label Inference"
- Danfeng Zhang and Daniel Kifer, 2017, "LightDP: Towards Automating Differential Privacy Proofs."
- Andrew Ferraiuolo, Rui Xu, Danfeng Zhang, Andrew C Myers and G. Edward Suh, 2017, "Verification of a Practical Hardware Security Architecture Through Static Information Flow Analysis"
- Shuai Wang, Pei Wang, Xiao Liu, Danfeng Zhang and Dinghao Wu, 2017, "CacheD: Identifying Cache-Based Timing Channels in Production Software", pp. 235-252
- Peixuan Li and Danfeng Zhang, 2017, "Towards a Flow- and Path-Sensitive Information Flow Analysis", pp. 53-67
- Yao Wang, Andrew Ferraiuolo, Danfeng Zhang, Andrew C. Myers and G. Edward Suh, 2016, "SecDCP: Secure dynamic cache partitioning for ecient timing channel protection"
- Andrew Ferraiuolo, Yao Wang, Danfeng Zhang, Andrew C. Myers and G. Edward Suh, 2016, "Lattice priority scheduling: Low-overhead timing channel protection for a shared memory controller"
- Danfeng Zhang, Andrew C. Myers, Dimitrios Vytiniotis and Simon L. Peyton Jones, 2015, "Diagnosing type errors with class", pp. 12–21
- Danfeng Zhang, Yao Wang, G. Edward Suh and Andrew C. Myers, 2015, "A Hardware Design Language for Timing-Sensitive Information-Flow Security", pp. 503–516
- Chris Hawblitzel, Jon Howell, Jacob R. Lorch, Arjun Narayan, Bryan Parno, Danfeng Zhang and Brian Zill, 2014, "Ironclad Apps: End-to-End Security via Automated Full-System Verification", pp. 165–181
- Danfeng Zhang and Andrew C. Myers, 2014, "Toward general diagnosis of static errors", pp. 569–582
- Danfeng Zhang, Aslan Askarov and Andrew C. Myers, 2012, "Language-based control and mitigation of timing channels", pp. 99–110
- Danfeng Zhang, Aslan Askarov and Andrew C. Myers, 2011, "Predictive mitigation of timing channels in interactive systems", pp. 563–574
- Aslan Askarov, Danfeng Zhang and Andrew C. Myers, 2010, "Predictive black-box mitigation of timing channels", pp. 297–307
- Danfeng Zhang, Yao Guo and Xiangqun Chen, 2008, "Automated Aspect Recommendation through Clustering-Based Fan-in Analysis", pp. 278–287
- Danfeng Zhang, Yao Guo, Yue Wang and Xiangqun Chen, 2007, "Toward Efficient Aspect Mining for Linux", pp. 191–198
Newsletter
- Danfeng Zhang, Yao Guo and Xiangqun Chen, 2008, "AspectC2C: a Symmetric Aspect Extension to the C Language", 43, (2), pp. 25-32
Technical Report
- Andrew Ferraiuolo, Yao Wang, Rui Xu, Danfeng Zhang, Andrew C. Myers and Edward Suh, 2015, "Full-Processor Timing Channel Protection with Applications to Secure Hardware Compartments", (1813–41218)
- Danfeng Zhang, Andrew C. Myers, Dimitrios Vytiniotis and Simon Peyton-Jones, 2015, "Diagnosing type errors with class", (1813–39907)
- Danfeng Zhang and Andrew C. Myers, 2014, "Toward general diagnosis of static errors: technical report", (1813–33742)
- Danfeng Zhang, Yao Wang, G. Edward Suh and Andrew C. Myers, 2014, "A hardware design language for efficient control of timing channels", (1813-36274)
- Danfeng Zhang, Aslan Askarov and Andrew C. Myers, 2012, "Language Mechanisms for Controlling and Mitigating Timing Channels", (1813–28635)
- Danfeng Zhang and Daniel Kifer, , "LightDP: Towards Automating Differential Privacy Proofs."
- Peixuan Li and Danfeng Zhang, , "Towards a Flow- and Path-Sensitive Information Flow Analysis: Technical Report"
