Colloquium: Software and Hardware Explorations of Machine-Learning and Deep-Learning Workloads

Usage of machine learning (ML) and deep learning (DL) based techniques have become quite popular lately. In this talk, I will focus on workloads using such techniques and discuss software and hardware optimizations.

I will discuss compute and memory access patterns of some key ML workloads and present a case study of CPU optimization for a popular ML workload. I will focus on sparsity for these workloads.

Then I will talk about compute and memory optimizations for DL workloads and discuss opportunities for acceleration of these workloads in CPUs and FPGAs. I will focus on low-precision for these workloads.

Speaker's Bio

 Dr. Asit Mishra is a Sr. Deep Learning Computer Architect at NVIDIA Corp. Prior to this, he was a researcher/computer architect in Accelerator Architecture Lab in Intel where he worked on CPU microarchitecture (execution blocks) and accelerators. He also contributed to Xeon's Crest (Nervana) line of processors. His current focus is low-precision training and inference of DL workloads and microarchitectures to accelerate these computations. Prior to joining Intel, Asit graduated from Penn State University with a PhD. 

 

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Media Contact: Chita Das

 
 

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The School of Electrical Engineering and Computer Science was created in the spring of 2015 to allow greater access to courses offered by both departments for undergraduate and graduate students in exciting collaborative research in fields.

We offer B.S. degrees in electrical engineering, computer science, computer engineering and data science and graduate degrees (master's degrees and Ph.D.'s) in electrical engineering and computer science and engineering. EECS focuses on the convergence of technologies and disciplines to meet today’s industrial demands.

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